--- BasiliskII-1.0.orig/src/uae_cpu/fpu/fpu_x86.cpp +++ BasiliskII-1.0/src/uae_cpu/fpu/fpu_x86.cpp @@ -146,6 +146,9 @@ #define _ASM __asm__ __volatile__ #define min(a, b) (((a) < (b)) ? (a) : (b)) +#define STR(x) STR_(x) +#define STR_(x) #x + /* ---------------------------- Configuration ---------------------------- */ /* @@ -1056,8 +1059,8 @@ } */ _ASM( "fstcw %0\n" - "andl $(~X86_ROUND_CONTROL_MASK), %0\n" + "andl $(~" STR(X86_ROUND_CONTROL_MASK) "), %0\n" - "orl $CW_RC_ZERO, %0\n" + "orl $" STR(CW_RC_ZERO) ", %0\n" "fldcw %0\n" "fldt %3\n" "frndint\n" @@ -1645,7 +1648,7 @@ "0:\n" // partial_loop "fprem \n" "fnstsw %2\n" // %2: status (read/write) - "testl $SW_C2, %2\n" + "testl $" STR(SW_C2) ", %2\n" "jne 0b\n" "fxam \n" "fnstsw %3\n" // %3: sw (write) @@ -1663,7 +1666,7 @@ "0:\n" // partial_loop "fprem \n" "fnstsw %0\n" // %0: status (read/write) - "testl $SW_C2, %0\n" + "testl $" STR(SW_C2) ", %0\n" "jne 0b\n" "fxam \n" "fnstsw %1\n" // %1: sw (write) @@ -1765,7 +1768,7 @@ "0:\n" // partial_loop "fprem1 \n" "fnstsw %2\n" // %2: status (read/write) - "testl $SW_C2, %2\n" + "testl $" STR(SW_C2) ", %2\n" "jne 0b\n" "fxam \n" "fnstsw %3\n" // %3: sw (write) @@ -1783,7 +1786,7 @@ "0:\n" // partial_loop "fprem1 \n" "fnstsw %0\n" // %0: status (read/write) - "testl $SW_C2, %0\n" + "testl $" STR(SW_C2) ", %0\n" "jne 0b\n" "fxam \n" "fnstsw %1\n" // %1: sw (write) @@ -1999,8 +2002,8 @@ FLDCW cw } */ _ASM( "fstcw %0\n" - "andl $(~X86_PRECISION_CONTROL_MASK), %0\n" + "andl $(~" STR(X86_PRECISION_CONTROL_MASK) "), %0\n" - "orl $PRECISION_CONTROL_SINGLE, %0\n" + "orl $" STR(PRECISION_CONTROL_SINGLE) ", %0\n" "fldcw %0\n" "fldt %3\n" "fldt %2\n" @@ -2079,8 +2082,8 @@ FLDCW cw } */ _ASM( "fstcw %0\n" - "andl $(~X86_PRECISION_CONTROL_MASK), %0\n" + "andl $(~" STR(X86_PRECISION_CONTROL_MASK) "), %0\n" - "orl $PRECISION_CONTROL_SINGLE, %0\n" + "orl $" STR(PRECISION_CONTROL_SINGLE) ", %0\n" "fldcw %0\n" "fldt %3\n" "fldt %2\n"