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| author |   Roman Lebedev <lebedev.ri@gmail.com> | 2020-12-01 15:04:40 +0300 |
|---|---|---|
| committer | Roman Lebedev <lebedev.ri@gmail.com> | 2020-12-01 15:13:07 +0300 |
| commit | 075faa8d40b113d19c3643b3bf2cc74f146612b0 (patch) | |
| tree | ed9e77fec6996b4cb40770dee640a3cbfdd36eac | |
| parent | [InstCombine] Evaluate new shift amount for sext(ashr(shl(trunc()))) fold in ... (diff) | |
| download | llvm-project-075faa8d40b113d19c3643b3bf2cc74f146612b0.tar.gz llvm-project-075faa8d40b113d19c3643b3bf2cc74f146612b0.tar.bz2 llvm-project-075faa8d40b113d19c3643b3bf2cc74f146612b0.zip | |
[NFC][InstCombine] Improve vector undef test coverage for sext(ashr(shl(trunc()))) fold
| -rw-r--r-- | llvm/test/Transforms/InstCombine/sext.ll | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/llvm/test/Transforms/InstCombine/sext.ll b/llvm/test/Transforms/InstCombine/sext.ll index cf2c44f23810..23639e9d9bf6 100644 --- a/llvm/test/Transforms/InstCombine/sext.ll +++ b/llvm/test/Transforms/InstCombine/sext.ll @@ -164,8 +164,36 @@ define <2 x i32> @test10_vec_nonuniform(<2 x i32> %i) { ret <2 x i32> %D } -define <2 x i32> @test10_vec_undef(<2 x i32> %i) { -; CHECK-LABEL: @test10_vec_undef( +define <2 x i32> @test10_vec_undef0(<2 x i32> %i) { +; CHECK-LABEL: @test10_vec_undef0( +; CHECK-NEXT: [[A:%.*]] = trunc <2 x i32> [[I:%.*]] to <2 x i8> +; CHECK-NEXT: [[B:%.*]] = shl <2 x i8> [[A]], <i8 6, i8 0> +; CHECK-NEXT: [[C:%.*]] = ashr <2 x i8> [[B]], <i8 6, i8 undef> +; CHECK-NEXT: [[D:%.*]] = sext <2 x i8> [[C]] to <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[D]] +; + %A = trunc <2 x i32> %i to <2 x i8> + %B = shl <2 x i8> %A, <i8 6, i8 0> + %C = ashr <2 x i8> %B, <i8 6, i8 undef> + %D = sext <2 x i8> %C to <2 x i32> + ret <2 x i32> %D +} +define <2 x i32> @test10_vec_undef1(<2 x i32> %i) { +; CHECK-LABEL: @test10_vec_undef1( +; CHECK-NEXT: [[A:%.*]] = trunc <2 x i32> [[I:%.*]] to <2 x i8> +; CHECK-NEXT: [[B:%.*]] = shl <2 x i8> [[A]], <i8 6, i8 undef> +; CHECK-NEXT: [[C:%.*]] = ashr <2 x i8> [[B]], <i8 6, i8 0> +; CHECK-NEXT: [[D:%.*]] = sext <2 x i8> [[C]] to <2 x i32> +; CHECK-NEXT: ret <2 x i32> [[D]] +; + %A = trunc <2 x i32> %i to <2 x i8> + %B = shl <2 x i8> %A, <i8 6, i8 undef> + %C = ashr <2 x i8> %B, <i8 6, i8 0> + %D = sext <2 x i8> %C to <2 x i32> + ret <2 x i32> %D +} +define <2 x i32> @test10_vec_undef2(<2 x i32> %i) { +; CHECK-LABEL: @test10_vec_undef2( ; CHECK-NEXT: [[D1:%.*]] = shl <2 x i32> [[I:%.*]], <i32 30, i32 24> ; CHECK-NEXT: [[D:%.*]] = ashr <2 x i32> [[D1]], <i32 30, i32 24> ; CHECK-NEXT: ret <2 x i32> [[D]] |