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| author |   Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-24 22:57:49 -0500 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-27 05:35:05 -0800 |
| commit | 06d9230fef996ca7d4d11d6b3f5f95e895a52198 (patch) | |
| tree | 3fccf32cd2c82cf21b6b8357edd9ebbc36640358 /llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | |
| parent | Re-land [Support] Extend TimeProfiler to support multiple threads (diff) | |
| download | llvm-project-06d9230fef996ca7d4d11d6b3f5f95e895a52198.tar.gz llvm-project-06d9230fef996ca7d4d11d6b3f5f95e895a52198.tar.bz2 llvm-project-06d9230fef996ca7d4d11d6b3f5f95e895a52198.zip | |
GlobalISel: Translate vector GEPs
Diffstat (limited to 'llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp index 67d9dacda61b..950044730cd6 100644 --- a/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp +++ b/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp @@ -222,9 +222,9 @@ void MachineIRBuilder::validateShiftOp(const LLT &Res, const LLT &Op0, MachineInstrBuilder MachineIRBuilder::buildPtrAdd(const DstOp &Res, const SrcOp &Op0, const SrcOp &Op1) { - assert(Res.getLLTTy(*getMRI()).isPointer() && + assert(Res.getLLTTy(*getMRI()).getScalarType().isPointer() && Res.getLLTTy(*getMRI()) == Op0.getLLTTy(*getMRI()) && "type mismatch"); - assert(Op1.getLLTTy(*getMRI()).isScalar() && "invalid offset type"); + assert(Op1.getLLTTy(*getMRI()).getScalarType().isScalar() && "invalid offset type"); return buildInstr(TargetOpcode::G_PTR_ADD, {Res}, {Op0, Op1}); } |