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authorSimon Pilgrim <llvm-dev@redking.me.uk>2020-01-13 11:07:53 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2020-01-13 11:08:12 +0000
commit8f49204f26ea8856b870d4c2344b98f4b706bea0 (patch)
tree70fb38f062d77cd099787b5d02a25f7e5fb1b920 /llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
parent[X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. (diff)
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[SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use of the known leading/trailing zeros for shifted values in cases where we don't know the shift amount value. This patch adds support to SelectionDAG::ComputeKnownBits to use KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the minimum guaranteed leading/trailing known zero bits. Differential Revision: https://reviews.llvm.org/D72573
Diffstat (limited to 'llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll')
-rw-r--r--llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
index 90e007cbd775..2a5bfeb3082e 100644
--- a/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
+++ b/llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
@@ -274,7 +274,7 @@ define i1 @scalar_i8_signbit_ne(i8 %x, i8 %y) nounwind {
; CHECK-NEXT: and w8, w0, #0xff
; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
; CHECK-NEXT: lsr w8, w8, w1
-; CHECK-NEXT: ubfx w0, w8, #7, #1
+; CHECK-NEXT: lsr w0, w8, #7
; CHECK-NEXT: ret
%t0 = shl i8 128, %y
%t1 = and i8 %t0, %x
@@ -344,7 +344,7 @@ define i1 @scalar_i8_signbit_eq_with_nonzero(i8 %x, i8 %y) nounwind {
; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
; CHECK-NEXT: lsl w8, w8, w1
; CHECK-NEXT: and w8, w8, w0
-; CHECK-NEXT: and w8, w8, #0xff
+; CHECK-NEXT: and w8, w8, #0x80
; CHECK-NEXT: cmp w8, #1 // =1
; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret