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| author |   serge-sans-paille <sguelton@redhat.com> | 2020-09-30 11:35:00 +0200 |
|---|---|---|
| committer |   Tom Stellard <tstellar@redhat.com> | 2020-11-24 21:57:55 -0500 |
| commit | a1e0363c7402f7aa58e24e0e6dfa447ebabc1910 (patch) | |
| tree | 14f5a4764234e565e5497f35bb54239fb185b011 /llvm | |
| parent | [X86] Don't produce bad x86andp nodes for i1 vectors (diff) | |
| download | llvm-project-a1e0363c7402f7aa58e24e0e6dfa447ebabc1910.tar.gz llvm-project-a1e0363c7402f7aa58e24e0e6dfa447ebabc1910.tar.bz2 llvm-project-a1e0363c7402f7aa58e24e0e6dfa447ebabc1910.zip | |
Fix limit behavior of dynamic alloca
When the allocation size is 0, we shouldn't probe. Within [1, PAGE_SIZE], we
should probe once etc.
This fixes https://bugs.llvm.org/show_bug.cgi?id=47657
Differential Revision: https://reviews.llvm.org/D88548
(cherry picked from commit 9573c9f2a363da71b2c07a3add4e52721e6028a0)
Diffstat (limited to 'llvm')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll | 8 |
2 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index fd1e6517dfac..f68ae4461fe3 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -31876,7 +31876,7 @@ X86TargetLowering::EmitLoweredProbedAlloca(MachineInstr &MI, BuildMI(testMBB, DL, TII->get(X86::JCC_1)) .addMBB(tailMBB) - .addImm(X86::COND_L); + .addImm(X86::COND_LE); testMBB->addSuccessor(blockMBB); testMBB->addSuccessor(tailMBB); diff --git a/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll b/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll index bc4678564083..82fd67842c8a 100644 --- a/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll +++ b/llvm/test/CodeGen/X86/stack-clash-dynamic-alloca.ll @@ -24,12 +24,12 @@ attributes #0 = {"probe-stack"="inline-asm"} ; CHECK-X86-64-NEXT: andq $-16, %rcx ; CHECK-X86-64-NEXT: subq %rcx, %rax ; CHECK-X86-64-NEXT: cmpq %rsp, %rax -; CHECK-X86-64-NEXT: jl .LBB0_3 +; CHECK-X86-64-NEXT: jle .LBB0_3 ; CHECK-X86-64-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1 ; CHECK-X86-64-NEXT: movq $0, (%rsp) ; CHECK-X86-64-NEXT: subq $4096, %rsp # imm = 0x1000 ; CHECK-X86-64-NEXT: cmpq %rsp, %rax -; CHECK-X86-64-NEXT: jge .LBB0_2 +; CHECK-X86-64-NEXT: jg .LBB0_2 ; CHECK-X86-64-NEXT: .LBB0_3: ; CHECK-X86-64-NEXT: movq %rax, %rsp ; CHECK-X86-64-NEXT: movl $1, 4792(%rax) @@ -54,12 +54,12 @@ attributes #0 = {"probe-stack"="inline-asm"} ; CHECK-X86-32-NEXT: andl $-16, %ecx ; CHECK-X86-32-NEXT: subl %ecx, %eax ; CHECK-X86-32-NEXT: cmpl %esp, %eax -; CHECK-X86-32-NEXT: jl .LBB0_3 +; CHECK-X86-32-NEXT: jle .LBB0_3 ; CHECK-X86-32-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1 ; CHECK-X86-32-NEXT: movl $0, (%esp) ; CHECK-X86-32-NEXT: subl $4096, %esp # imm = 0x1000 ; CHECK-X86-32-NEXT: cmpl %esp, %eax -; CHECK-X86-32-NEXT: jge .LBB0_2 +; CHECK-X86-32-NEXT: jg .LBB0_2 ; CHECK-X86-32-NEXT: .LBB0_3: ; CHECK-X86-32-NEXT: movl %eax, %esp ; CHECK-X86-32-NEXT: movl $1, 4792(%eax) |