1 files changed, 1037 insertions, 0 deletions
diff --git a/llvm/test/Analysis/ValueTracking/known-non-equal.ll b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
index 362db26bed84..6a68dc6cab20 100644
--- a/llvm/test/Analysis/ValueTracking/known-non-equal.ll
+++ b/llvm/test/Analysis/ValueTracking/known-non-equal.ll
@@ -291,4 +291,1041 @@ define i1 @mul_other_may_be_zero_or_one(i16 %x, i16 %y) {
   ret i1 %cmp
 }
 
+define i1 @known_non_equal_phis(i8 %p, i8* %pq, i8 %n, i8 %r) {
+; CHECK-LABEL: @known_non_equal_phis(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[A:%.*]] = phi i8 [ 2, [[ENTRY:%.*]] ], [ [[NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[NEXT]] = mul nsw i8 [[A]], 2
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[A]], [[N:%.*]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK:       exit:
+; CHECK-NEXT:    ret i1 true
+;
+entry:
+  br label %loop
+loop:
+  %A = phi i8 [ 2, %entry ], [ %next, %loop ]
+  %B = phi i8 [ 3, %entry ], [ %A, %loop ]
+  %next = mul nsw i8 %A, 2
+  %cmp1 = icmp eq i8 %A, %n
+  br i1 %cmp1, label %exit, label %loop
+exit:
+  %cmp = icmp ne i8 %A, %B
+  ret i1 %cmp
+}
+
+define i1 @known_non_equal_phis_fail(i8 %p, i8* %pq, i8 %n, i8 %r) {
+; CHECK-LABEL: @known_non_equal_phis_fail(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[A:%.*]] = phi i8 [ 2, [[ENTRY:%.*]] ], [ [[NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B:%.*]] = phi i8 [ 2, [[ENTRY]] ], [ [[A]], [[LOOP]] ]
+; CHECK-NEXT:    [[NEXT]] = mul nsw i8 [[A]], 2
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq i8 [[A]], [[N:%.*]]
+; CHECK-NEXT:    br i1 [[CMP1]], label [[EXIT:%.*]], label [[LOOP]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i8 [[A]], [[B]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+entry:
+  br label %loop
+loop:
+  %A = phi i8 [ 2, %entry ], [ %next, %loop ]
+  %B = phi i8 [ 2, %entry ], [ %A, %loop ]
+  %next = mul nsw i8 %A, 2
+  %cmp1 = icmp eq i8 %A, %n
+  br i1 %cmp1, label %exit, label %loop
+exit:
+  %cmp = icmp ne i8 %A, %B
+  ret i1 %cmp
+}
+
+define i1 @shl_nuw(i16 %x) {
+; CHECK-LABEL: @shl_nuw(
+; CHECK-NEXT:    ret i1 false
+;
+  %nz = or i16 %x, 2
+  %mul = shl nuw i16 %nz, 1
+  %cmp = icmp eq i16 %nz, %mul
+  ret i1 %cmp
+}
+
+define i1 @shl_nsw(i16 %x) {
+; CHECK-LABEL: @shl_nsw(
+; CHECK-NEXT:    ret i1 false
+;
+  %nz = or i16 %x, 2
+  %mul = shl nsw i16 %nz, 1
+  %cmp = icmp eq i16 %nz, %mul
+  ret i1 %cmp
+}
+
+define i1 @shl_may_wrap(i16 %x) {
+; CHECK-LABEL: @shl_may_wrap(
+; CHECK-NEXT:    [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT:    [[MUL:%.*]] = shl i16 [[NZ]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %nz = or i16 %x, 2
+  %mul = shl i16 %nz, 1
+  %cmp = icmp eq i16 %nz, %mul
+  ret i1 %cmp
+}
+
+define i1 @shl_shift_may_be_zero(i16 %x, i16 %shift) {
+; CHECK-LABEL: @shl_shift_may_be_zero(
+; CHECK-NEXT:    [[NZ:%.*]] = or i16 [[X:%.*]], 2
+; CHECK-NEXT:    [[MUL:%.*]] = shl nuw i16 [[NZ]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[NZ]], [[MUL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %nz = or i16 %x, 2
+  %mul = shl nuw i16 %nz, %shift
+  %cmp = icmp eq i16 %nz, %mul
+  ret i1 %cmp
+}
+
+define i1 @shl_op_may_be_zero(i16 %x) {
+; CHECK-LABEL: @shl_op_may_be_zero(
+; CHECK-NEXT:    [[MUL:%.*]] = shl nuw i16 [[X:%.*]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i16 [[X]], [[MUL]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %mul = shl nuw i16 %x, 1
+  %cmp = icmp eq i16 %x, %mul
+  ret i1 %cmp
+}
+
+; The additional muls in these tests are necessary to actually
+; test the isKnownNonEqual() code, rather than InstSimplify's own
+; comparison folding.
+
+define i1 @shl_shl_nuw(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_nuw(
+; CHECK-NEXT:    ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = shl nuw i8 %A, %shift
+  %B.op = shl nuw i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @shl_shl_nsw(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_nsw(
+; CHECK-NEXT:    ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = shl nsw i8 %A, %shift
+  %B.op = shl nsw i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @shl_shl_may_wrap(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_may_wrap(
+; CHECK-NEXT:    [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:    [[A_OP:%.*]] = shl i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = shl nsw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = shl i8 %A, %shift
+  %B.op = shl nsw i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @shl_shl_mixed_wrap(i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_mixed_wrap(
+; CHECK-NEXT:    [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:    [[A_OP:%.*]] = shl nuw i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = shl nsw i8 [[B]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = shl nuw i8 %A, %shift
+  %B.op = shl nsw i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @shl_shl_may_be_equal(i8 %A, i8 %B, i8 %shift) {
+; CHECK-LABEL: @shl_shl_may_be_equal(
+; CHECK-NEXT:    [[A_OP:%.*]] = shl nuw i8 [[A:%.*]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = shl nuw i8 [[B:%.*]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A.op = shl nuw i8 %A, %shift
+  %B.op = shl nuw i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @ashr_ashr_exact(i8 %B, i8 %shift) {
+; CHECK-LABEL: @ashr_ashr_exact(
+; CHECK-NEXT:    ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = ashr exact i8 %A, %shift
+  %B.op = ashr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @ashr_ashr_discard_bits(i8 %B, i8 %shift) {
+; CHECK-LABEL: @ashr_ashr_discard_bits(
+; CHECK-NEXT:    [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:    [[A_OP:%.*]] = ashr i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = ashr exact i8 [[B]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = ashr i8 %A, %shift
+  %B.op = ashr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @ashr_ashr_may_be_equal(i8 %A, i8 %B, i8 %shift) {
+; CHECK-LABEL: @ashr_ashr_may_be_equal(
+; CHECK-NEXT:    [[A_OP:%.*]] = ashr exact i8 [[A:%.*]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = ashr exact i8 [[B:%.*]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A.op = ashr exact i8 %A, %shift
+  %B.op = ashr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @lshr_lshr_exact(i8 %B, i8 %shift) {
+; CHECK-LABEL: @lshr_lshr_exact(
+; CHECK-NEXT:    ret i1 false
+;
+  %A = add i8 %B, 1
+  %A.op = lshr exact i8 %A, %shift
+  %B.op = lshr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @lshr_lshr_discard_bits(i8 %B, i8 %shift) {
+; CHECK-LABEL: @lshr_lshr_discard_bits(
+; CHECK-NEXT:    [[A:%.*]] = add i8 [[B:%.*]], 1
+; CHECK-NEXT:    [[A_OP:%.*]] = lshr i8 [[A]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = lshr exact i8 [[B]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A = add i8 %B, 1
+  %A.op = lshr i8 %A, %shift
+  %B.op = lshr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @lshr_lshr_may_be_equal(i8 %A, i8 %B, i8 %shift) {
+; CHECK-LABEL: @lshr_lshr_may_be_equal(
+; CHECK-NEXT:    [[A_OP:%.*]] = lshr exact i8 [[A:%.*]], [[SHIFT:%.*]]
+; CHECK-NEXT:    [[B_OP:%.*]] = lshr exact i8 [[B:%.*]], [[SHIFT]]
+; CHECK-NEXT:    [[A_OP2:%.*]] = mul nuw i8 [[A_OP]], 3
+; CHECK-NEXT:    [[B_OP2:%.*]] = mul nuw i8 [[B_OP]], 3
+; CHECK-NEXT:    [[CMP:%.*]] = icmp eq i8 [[A_OP2]], [[B_OP2]]
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %A.op = lshr exact i8 %A, %shift
+  %B.op = lshr exact i8 %B, %shift
+  %A.op2 = mul nuw i8 %A.op, 3
+  %B.op2 = mul nuw i8 %B.op, 3
+  %cmp = icmp eq i8 %A.op2, %B.op2
+  ret i1 %cmp
+}
+
+define i1 @recurrence_add_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_add_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = add i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = add i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = add i8 %A.iv, 1
+  %B.iv.next = add i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_add_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_add_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = add i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = add i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = add i8 %A.iv, 1
+  %B.iv.next = add i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_add_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_add_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = add i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = add i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = add i8 %A.iv, 1
+  %B.iv.next = add i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+
+define i1 @recurrence_sub_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_sub_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = sub i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = sub i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = sub i8 %A.iv, 1
+  %B.iv.next = sub i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_sub_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_sub_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = sub i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = sub i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = sub i8 %A.iv, 1
+  %B.iv.next = sub i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_sub_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_sub_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = sub i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = sub i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = sub i8 %A.iv, 1
+  %B.iv.next = sub i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_mul_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_mul_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = mul nuw i8 [[A_IV]], 2
+; CHECK-NEXT:    [[B_IV_NEXT]] = mul nuw i8 [[B_IV]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = mul nuw i8 %A.iv, 2
+  %B.iv.next = mul nuw i8 %B.iv, 2
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_mul_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_mul_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = mul nuw i8 [[A_IV]], 2
+; CHECK-NEXT:    [[B_IV_NEXT]] = mul nuw i8 [[B_IV]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = mul nuw i8 %A.iv, 2
+  %B.iv.next = mul nuw i8 %B.iv, 2
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_mul_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_mul_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = mul nuw i8 [[A_IV]], 2
+; CHECK-NEXT:    [[B_IV_NEXT]] = mul nuw i8 [[B_IV]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = mul nuw i8 %A.iv, 2
+  %B.iv.next = mul nuw i8 %B.iv, 2
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_mul_noflags(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_mul_noflags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = mul i8 [[A_IV]], 2
+; CHECK-NEXT:    [[B_IV_NEXT]] = mul i8 [[B_IV]], 2
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = mul i8 %A.iv, 2
+  %B.iv.next = mul i8 %B.iv, 2
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_shl_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_shl_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = shl nuw i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = shl nuw i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = shl nuw i8 %A.iv, 1
+  %B.iv.next = shl nuw i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_shl_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_shl_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = shl nuw i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = shl nuw i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = shl nuw i8 %A.iv, 1
+  %B.iv.next = shl nuw i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_shl_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_shl_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = shl nuw i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = shl nuw i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = shl nuw i8 %A.iv, 1
+  %B.iv.next = shl nuw i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_shl_noflags(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_shl_noflags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = shl i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = shl i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = shl i8 %A.iv, 1
+  %B.iv.next = shl i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_lshr_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_lshr_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = lshr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = lshr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = lshr exact i8 %A.iv, 1
+  %B.iv.next = lshr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_lshr_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_lshr_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = lshr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = lshr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = lshr exact i8 %A.iv, 1
+  %B.iv.next = lshr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_lshr_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_lshr_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = lshr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = lshr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = lshr exact i8 %A.iv, 1
+  %B.iv.next = lshr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_lshr_noflags(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_lshr_noflags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = lshr i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = lshr i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = lshr i8 %A.iv, 1
+  %B.iv.next = lshr i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_ashr_neq(i8 %A) {
+; CHECK-LABEL: @recurrence_ashr_neq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[B:%.*]] = add i8 [[A:%.*]], 1
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = ashr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = ashr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 1
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = ashr exact i8 %A.iv, 1
+  %B.iv.next = ashr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_ashr_eq(i8 %A) {
+; CHECK-LABEL: @recurrence_ashr_eq(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[A]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = ashr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = ashr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  %B = add i8 %A, 0
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = ashr exact i8 %A.iv, 1
+  %B.iv.next = ashr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_ashr_unknown(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_ashr_unknown(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = ashr exact i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = ashr exact i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = ashr exact i8 %A.iv, 1
+  %B.iv.next = ashr exact i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
+define i1 @recurrence_ashr_noflags(i8 %A, i8 %B) {
+; CHECK-LABEL: @recurrence_ashr_noflags(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    br label [[LOOP:%.*]]
+; CHECK:       loop:
+; CHECK-NEXT:    [[IV:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[A_IV:%.*]] = phi i8 [ [[A:%.*]], [[ENTRY]] ], [ [[A_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[B_IV:%.*]] = phi i8 [ [[B:%.*]], [[ENTRY]] ], [ [[B_IV_NEXT:%.*]], [[LOOP]] ]
+; CHECK-NEXT:    [[IV_NEXT]] = add i64 [[IV]], 1
+; CHECK-NEXT:    [[A_IV_NEXT]] = ashr i8 [[A_IV]], 1
+; CHECK-NEXT:    [[B_IV_NEXT]] = ashr i8 [[B_IV]], 1
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ne i64 [[IV_NEXT]], 10
+; CHECK-NEXT:    br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
+; CHECK:       exit:
+; CHECK-NEXT:    [[RES:%.*]] = icmp eq i8 [[A_IV]], [[B_IV]]
+; CHECK-NEXT:    ret i1 [[RES]]
+;
+entry:
+  br label %loop
+loop:
+  %iv = phi i64 [0, %entry], [%iv.next, %loop]
+  %A.iv = phi i8 [%A, %entry], [%A.iv.next, %loop]
+  %B.iv = phi i8 [%B, %entry], [%B.iv.next, %loop]
+  %iv.next = add i64 %iv, 1
+  %A.iv.next = ashr i8 %A.iv, 1
+  %B.iv.next = ashr i8 %B.iv, 1
+  %cmp = icmp ne i64 %iv.next, 10
+  br i1 %cmp, label %loop, label %exit
+exit:
+  %res = icmp eq i8 %A.iv, %B.iv
+  ret i1 %res
+}
+
 !0 = !{ i8 1, i8 5 }