| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [X86][NFC] Move instruction selection of the x86_tdpb[s,u]d_internal and x86_... |   Liu, Chen3 | 2021-03-09 | 1 | -39/+0 |
| * | [X86] X86ISelDAGToDAG.cpp - include cstdint instead of stdint.h NFCI. |   Simon Pilgrim | 2021-03-05 | 1 | -1/+2 |
| * | [X86] X86DAGToDAGISel::Select - merge X86::TEST load bitsize checks. NFCI. | Simon Pilgrim | 2021-03-05 | 1 | -5/+3 |
| * | [X86] Support amx-bf16 intrinsic. | Liu, Chen3 | 2021-02-25 | 1 | -1/+1 |
| * | [X86] Support amx-int8 intrinsic. | Liu, Chen3 | 2021-02-23 | 1 | -2/+13 |
| * | [X86] Fix tile config register spill issue. |   Wang, Pengfei | 2021-01-30 | 1 | -8/+1 |
| * | [X86] In shrinkAndImmediate, place the new constant into the topological sort. |   Craig Topper | 2021-01-26 | 1 | -1/+2 |
| * | Revert "[X86][AMX] Fix tile config register spill issue." |   Luo, Yuanke | 2021-01-21 | 1 | -1/+8 |
| * | [X86][AMX] Fix tile config register spill issue. | Luo, Yuanke | 2021-01-21 | 1 | -8/+1 |
| * | Support tilezero intrinsic and c interface for AMX. | Luo, Yuanke | 2020-12-31 | 1 | -0/+12 |
| * | [X86] Add x86_amx type for intel AMX. | Luo, Yuanke | 2020-12-30 | 1 | -2/+2 |
| * | [X86] Avoid %fs:(%eax) references in x32 mode |   Harald van Dijk | 2020-12-16 | 1 | -6/+30 |
| * | [X86] Add chain in ISel for x86_tdpbssd_internal intrinsic. | Luo, Yuanke | 2020-12-12 | 1 | -1/+3 |
| * | [X86] AMX programming model. | Luo, Yuanke | 2020-12-10 | 1 | -0/+68 |
| * | [X86] Use APInt::isSignedIntN instead of isIntN for 64-bit ANDs in X86DAGToDA... | Craig Topper | 2020-12-09 | 1 | -1/+1 |
| * | Use PC-relative address for x32 TLS address |   H.J. Lu | 2020-12-02 | 1 | -2/+2 |
| * | [X86] Alternate implementation of D88194. |   Craig Topper | 2020-10-27 | 1 | -0/+60 |
| * | [X86] Encode global address in small code model |   Wei Wang | 2020-10-26 | 1 | -2/+5 |
| * | [X86] Add memory operand to AESENC/AESDEC Key Locker instructions. |   Craig Topper | 2020-10-03 | 1 | -9/+2 |
| * | [X86] Move ENCODEKEY128/256 handling from lowering to selection. | Craig Topper | 2020-10-03 | 1 | -4/+36 |
| * | [X86] Add X86ISD opcodes for the Key Locker AESENC*KL and AESDEC*KL instructions | Craig Topper | 2020-10-03 | 1 | -0/+63 |
| * | [X86] Place new constant node in topological order in X86DAGToDAGISel::matchB... | Craig Topper | 2020-09-14 | 1 | -0/+1 |
| * | Revert "[X86] Place new constant node in topological order in X86DAGToDAGISel... | Craig Topper | 2020-09-14 | 1 | -1/+0 |
| * | [X86] Place new constant node in topological order in X86DAGToDAGISel::matchB... | Craig Topper | 2020-09-14 | 1 | -0/+1 |
| * | [X86] Fix llvm-qualified-auto warning by using auto*. NFC. | Simon Pilgrim | 2020-09-03 | 1 | -1/+1 |
| * | [X86] Make PreprocessISelDAG create X86ISD::VRNDSCALE nodes with i32 constant... | Craig Topper | 2020-08-17 | 1 | -2/+2 |
| * | [X86] Custom match X86ISD::VPTERNLOG in X86ISelDAGToDAG in order to reduce is... | Craig Topper | 2020-08-10 | 1 | -82/+105 |
| * | [X86][FPEnv] Teach X86 mask compare intrinsics to respect strict FP semantics. | Wang, Pengfei | 2020-08-11 | 1 | -3/+3 |
| * | [X86] Support matching VPTERNLOG when the root node is X86ISD::ANDNP. | Craig Topper | 2020-08-08 | 1 | -0/+11 |
| * | [X86] Refactor the broadcast and load folding in tryVPTESTM to reduce some code. | Craig Topper | 2020-07-31 | 1 | -58/+46 |
| * | [X86] Use TargetLowering::getRegClassFor to simplify some code in tryVPTESTM.... | Craig Topper | 2020-07-31 | 1 | -14/+2 |
| * | [X86] Simplify vpternlog immediate selection. | Craig Topper | 2020-07-31 | 1 | -31/+18 |
| * | [X86] Add custom lowering for llvm.roundeven with sse4.1. | Craig Topper | 2020-07-29 | 1 | -0/+4 |
| * | [X86] Turn X86DAGToDAGISel::tryVPTERNLOG into a fully custom instruction sele... | Craig Topper | 2020-07-26 | 1 | -18/+133 |
| * | Fold the opt size check into the assert to silence an unused variable warning. |   Eric Christopher | 2020-07-13 | 1 | -2/+1 |
| * | [PGO][PGSO] Add profile guided size optimization to X86ISelDAGToDAG. |   Hiroshi Yamauchi | 2020-07-13 | 1 | -7/+3 |
| * | [X86-64] Support Intel AMX Intrinsic |   Xiang1 Zhang | 2020-07-07 | 1 | -1/+32 |
| * | [X86] Add matching support for X86ISD::ANDNP to X86DAGToDAGISel::tryVPTERNLOG. | Craig Topper | 2020-07-03 | 1 | -11/+14 |
| * | [X86] Add back support for matching VPTERNLOG from back to back logic ops. | Craig Topper | 2020-07-02 | 1 | -1/+79 |
| * | [X86] Use some preprocessor macros to reduce the very similar repeated code i... | Craig Topper | 2020-06-30 | 1 | -140/+31 |
| * | [Alignment][NFC] Migrate PPC, X86 and XCore backends to Align |   Guillaume Chatelet | 2020-06-30 | 1 | -5/+5 |
| * | Recommit "[X86] Separate imm from relocImm handling." | Craig Topper | 2020-06-15 | 1 | -14/+0 |
| * | Revert "[X86] Separate imm from relocImm handling." |   Hans Wennborg | 2020-06-15 | 1 | -0/+14 |
| * | [X86] Separate imm from relocImm handling. | Craig Topper | 2020-06-13 | 1 | -14/+0 |
| * | [X86] Use X86AS enum constants to replace hardcoded numbers in more places. NFC | Craig Topper | 2020-06-10 | 1 | -7/+6 |
| * | [X86] Split imm handling out of selectMOV64Imm32 and add a separate isel patt... | Craig Topper | 2020-06-10 | 1 | -9/+0 |
| * | [x86] refine conditions for immediate hoisting to save code-size |   Sanjay Patel | 2020-06-09 | 1 | -3/+4 |
| * | [X86] Add a flag to guard the wide load |   Guozhi Wei | 2020-06-02 | 1 | -0/+4 |
| * | [X86] Remove DeleteNode calls from PreprocessISelDAG. Rely on the RemoveDeadN... | Craig Topper | 2020-06-02 | 1 | -15/+18 |
| * | [X86] Add pseudo instructions to use MULX with a single destination when the ... | Craig Topper | 2020-05-30 | 1 | -6/+20 |
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