| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | [TargetLowering] move "o" and "X" constraint handling to base class |   Nick Desaulniers | 2021-04-19 | 1 | -5/+1 |
| * | [X86][CostModel] X86TTIImpl::getShuffleCost(): subvector insertions are cheap |   Roman Lebedev | 2021-04-19 | 1 | -0/+13 |
| * | Normalize interaction with boolean attributes |   Serge Guelton | 2021-04-17 | 1 | -2/+1 |
| * | [X86][CostModel] Fix cost model for non-power-of-two vector load/stores | Roman Lebedev | 2021-04-16 | 1 | -28/+34 |
| * | [X86] combineCMP - fold cmpEQ/NE(TRUNC(X),0) -> cmpEQ/NE(X,0) |   Simon Pilgrim | 2021-04-15 | 1 | -5/+18 |
| * | [TTI] NFC: Change getArithmeticInstrCost to return InstructionCost |   Sander de Smalen | 2021-04-14 | 2 | -19/+15 |
| * | [TTI] NFC: Change getVectorInstrCost to return InstructionCost | Sander de Smalen | 2021-04-14 | 2 | -4/+6 |
| * | [TTI] NFC: Change getShuffleCost to return InstructionCost | Sander de Smalen | 2021-04-14 | 2 | -13/+15 |
| * | [TTI] NFC: Change getCFInstrCost to return InstructionCost | Sander de Smalen | 2021-04-14 | 2 | -6/+6 |
| * | [X86][SSE] canonicalizeShuffleWithBinOps - check for more combos of merge-abl... | Simon Pilgrim | 2021-04-14 | 1 | -2/+6 |
| * | [X86] Fold cmpeq/ne(trunc(x),0) --> cmpeq/ne(x,0) | Simon Pilgrim | 2021-04-14 | 1 | -6/+3 |
| * | [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits... | Simon Pilgrim | 2021-04-14 | 1 | -1/+1 |
| * | [NFC] Fix unused warning. |   Bogdan Graur | 2021-04-14 | 1 | -0/+1 |
| * | [X86][AMX] Refactor for PostRA ldtilecfg pass. |   Wang, Pengfei | 2021-04-14 | 2 | -177/+118 |
| * | [X86][SSE] combineSetCCMOVMSK - allow comparison with upper (known zero) bits... | Simon Pilgrim | 2021-04-13 | 1 | -1/+1 |
| * | [TTI] NFC: Change get[Interleaved]MemoryOpCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -34/+36 |
| * | [TTI] NFC: Change getMaskedMemoryOpCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -8/+9 |
| * | [TTI] NFC: Change getCmpSelInstrCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -25/+30 |
| * | [TTI] NFC: Change getMinMaxReductionCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -9/+11 |
| * | [TTI] NFC: Change getArithmeticReductionCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -6/+7 |
| * | [TTI] NFC: Change getGatherScatterOpCost to return InstructionCost | Sander de Smalen | 2021-04-13 | 2 | -9/+9 |
| * | [TTI] NFC: Change getCastInstrCost and getExtractWithExtendCost to return Ins... | Sander de Smalen | 2021-04-13 | 2 | -11/+14 |
| * | [X86] Support -march=rocketlake |   Freddy Ye | 2021-04-13 | 1 | -6/+6 |
| * | [X86] Fold cmpeq/ne(trunc(logic(x)),0) --> cmpeq/ne(logic(x),0) | Simon Pilgrim | 2021-04-12 | 1 | -1/+22 |
| * | [X86][AMX] Hoist ldtilecfg | Wang, Pengfei | 2021-04-12 | 1 | -285/+275 |
| * | [X86] Pass to transform tdpbsud&tdpbusd&tdpbuud intrinsics to scalar operation |   Bing1 Yu | 2021-04-12 | 1 | -6/+66 |
| * | [X86] Remove FeatureCLWB from FeaturesICLClient | Freddy Ye | 2021-04-12 | 1 | -1/+2 |
| * | [X86][AVX512] Fold not(kmov(x)) -> kmov(not(x)) and not(widen_subvector(x)) -... | Simon Pilgrim | 2021-04-11 | 1 | -0/+22 |
| * | [X86] combineXor - Pull out repeated getOperand() calls. NFCI. | Simon Pilgrim | 2021-04-11 | 1 | -11/+12 |
| * | [X86] Fold cmpeq/ne(and(X,Y),Y) --> cmpeq/ne(and(~X,Y),0) | Simon Pilgrim | 2021-04-11 | 1 | -2/+20 |
| * | [AMDGPU][CostModel] Refine cost model for control-flow instructions. |   dfukalov | 2021-04-10 | 2 | -4/+6 |
| * | [X86] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y),0) on non-BMI targets (... | Simon Pilgrim | 2021-04-09 | 1 | -1/+1 |
| * | [X86][BMI] Fold cmpeq/ne(or(X,Y),X) --> cmpeq/ne(and(~X,Y),0) (PR44136) | Simon Pilgrim | 2021-04-09 | 1 | -0/+20 |
| * | [NFC][AA] Prepare to convert AliasResult to class with PartialAlias offset. | dfukalov | 2021-04-09 | 1 | -4/+3 |
| * | [X86] combineHorizOpWithShuffle - peek through one use bitcasts when decoding... | Simon Pilgrim | 2021-04-09 | 1 | -38/+39 |
| * | [X86] Improve optimizeCompareInstr for signed comparisons after AND/OR/XOR in... | Simon Pilgrim | 2021-04-07 | 1 | -15/+15 |
| * | [X86] Improve optimizeCompareInstr for signed comparisons after BZHI instruct... | Simon Pilgrim | 2021-04-07 | 1 | -2/+2 |
| * | [docs] Fix doxygen comments wrongly attached to the llvm namespace |   Nicolás Alvarez | 2021-04-07 | 2 | -2/+2 |
| * | [X86][SSE] canonicalizeShuffleWithBinOps - add MOVSD/MOVSS handling. | Simon Pilgrim | 2021-04-06 | 1 | -0/+2 |
| * | [X86] Improve optimizeCompareInstr for signed comparisons after ANDN instruct... | Simon Pilgrim | 2021-04-06 | 1 | -2/+2 |
| * | [CostModel][X86] Improve accuracy of vXi8 multiply reduction costs | Simon Pilgrim | 2021-04-06 | 1 | -0/+10 |
| * | [KnownBits] Rename KnownBits::computeForMul to KnownBits::mul. NFCI. | Simon Pilgrim | 2021-04-06 | 1 | -1/+1 |
| * | [X86] Fold xor(zext(xor(x,c1)),c2) -> xor(zext(x),xor(zext(c1),c2)) | Simon Pilgrim | 2021-04-05 | 1 | -4/+6 |
| * | [NFC][X86] Split VPMOV* AVX2 instructions into their own sched class | Roman Lebedev | 2021-04-03 | 13 | -11/+13 |
| * | [FastISel] Remove kill tracking |   Nikita Popov | 2021-04-03 | 1 | -128/+72 |
| * | [X86] Fold xor(truncate(xor(x,c1)),c2) -> xor(truncate(x),xor(truncate(c1),c2)) | Simon Pilgrim | 2021-04-03 | 1 | -2/+17 |
| * | [X86][SSE] isHorizontalBinOp - use getTargetShuffleInputs helper (REAPPLIED) | Simon Pilgrim | 2021-04-03 | 1 | -24/+15 |
| * | Revert "[X86][SSE] isHorizontalBinOp - use getTargetShuffleInputs helper" |   Nico Weber | 2021-04-02 | 1 | -13/+21 |
| * | [X86][SSE] isHorizontalBinOp - use getTargetShuffleInputs helper | Simon Pilgrim | 2021-04-02 | 1 | -21/+13 |
| * | [X86] Fix -Wunused-function warning (NFC) |   Yang Fan | 2021-04-02 | 1 | -1/+1 |
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