; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve %s -o - | FileCheck %s ; ; Compares ; define i32 @cmpge_nxv16i8( %pg, %a, %b) { ; CHECK-LABEL: cmpge_nxv16i8: ; CHECK: cmpge p0.b, p0/z, z0.b, z1.b ; CHECK-NEXT: cset w0, ne ; CHECK-NEXT: ret %1 = tail call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %a, %b) %2 = tail call i1 @llvm.aarch64.sve.ptest.any( %pg, %1) %conv = zext i1 %2 to i32 ret i32 %conv } ; ; Immediate Compares ; define i32 @cmpge_imm_nxv16i8( %pg, %a) { ; CHECK-LABEL: cmpge_imm_nxv16i8: ; CHECK: cmpge p0.b, p0/z, z0.b, #0 ; CHECK-NEXT: cset w0, ne ; CHECK-NEXT: ret %1 = tail call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %a, zeroinitializer) %2 = tail call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) %3 = tail call i1 @llvm.aarch64.sve.ptest.any( %2, %1) %conv = zext i1 %3 to i32 ret i32 %conv } ; ; Wide Compares ; define i32 @cmpge_wide_nxv16i8( %pg, %a, %b) { ; CHECK-LABEL: cmpge_wide_nxv16i8: ; CHECK: cmpge p0.b, p0/z, z0.b, z1.d ; CHECK-NEXT: cset w0, ne ; CHECK-NEXT: ret %1 = tail call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %a, %b) %2 = tail call i1 @llvm.aarch64.sve.ptest.any( %pg, %1) %conv = zext i1 %2 to i32 ret i32 %conv } declare @llvm.aarch64.sve.cmpge.nxv16i8(, , ) declare @llvm.aarch64.sve.cmpge.wide.nxv16i8(, , ) declare i1 @llvm.aarch64.sve.ptest.any(, ) declare @llvm.aarch64.sve.ptrue.nxv16i1(i32)