From bce5259b1e5ab711323b125da5448e2c3b1a463d Mon Sep 17 00:00:00 2001 From: "Andreas K. Hüttel" Date: Sat, 13 Aug 2022 20:29:08 +0900 Subject: arch: Add subarch definition for riscv64 softfloat musl (part 2) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Andreas K. Hüttel --- catalyst/arch/riscv.py | 1 + 1 file changed, 1 insertion(+) diff --git a/catalyst/arch/riscv.py b/catalyst/arch/riscv.py index 975bce99..3b7796d9 100644 --- a/catalyst/arch/riscv.py +++ b/catalyst/arch/riscv.py @@ -61,6 +61,7 @@ def register(): "rv64_lp64d" : arch_rv64_lp64d, "rv64_lp64d_musl" : arch_rv64_lp64d_musl, "rv64_lp64" : arch_rv64_lp64, + "rv64_lp64_musl" : arch_rv64_lp64_musl, "rv32_ilp32d" : arch_rv32_ilp32d, "rv32_ilp32" : arch_rv32_ilp32 }, ("rv64_multilib")) -- cgit v1.2.3-65-gdbad