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| author |   陳韋任 (Wei-Ren Chen) <chenwj@iis.sinica.edu.tw> | 2012-11-14 10:49:55 +0800 |
|---|---|---|
| committer |   Doug Goldstein <cardoe@cardoe.com> | 2012-12-13 15:31:59 -0600 |
| commit | 49aff2b3aa5fabfa10f649f6a90ef14af5952015 (patch) | |
| tree | dec8aeed6cecc2933ac0249ddc779d5431e7c92e | |
| parent | mips/malta: fix CBUS UART interrupt pin (diff) | |
| download | qemu-kvm-49aff2b3aa5fabfa10f649f6a90ef14af5952015.tar.gz qemu-kvm-49aff2b3aa5fabfa10f649f6a90ef14af5952015.tar.bz2 qemu-kvm-49aff2b3aa5fabfa10f649f6a90ef14af5952015.zip | |
target-mips: fix wrong microMIPS opcode encoding
While reading microMIPS decoding, I found a possible wrong opcode
encoding. According to [1] page 166, the bits 13..12 for MULTU is
0x01 rather than 0x00. Please review, thanks.
[1] MIPS Architecture for Programmers VolumeIV-e: The MIPS DSP
Application-Specific Extension to the microMIPS32 Architecture
Signed-off-by: Chen Wei-Ren <chenwj@iis.sinica.edu.tw>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit 6801038bc52d61f81ac8a25fbe392f1bad982887)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
(cherry picked from commit 357414daa4915fb2312fff2af2d4ef28147f3eeb)
| -rw-r--r-- | target-mips/translate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 4e04e97ce..49907bb6f 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -9486,7 +9486,7 @@ enum { /* bits 13..12 for 0x32 */ MULT_ACC = 0x0, - MULTU_ACC = 0x0, + MULTU_ACC = 0x1, /* bits 15..12 for 0x2c */ SEB = 0x2, |