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| author |   Aurelien Jarno <aurelien@aurel32.net> | 2012-10-09 21:53:12 +0200 |
|---|---|---|
| committer |   Doug Goldstein <cardoe@cardoe.com> | 2012-12-13 15:31:59 -0600 |
| commit | b3be4af3b1be2c749b1b46c179786e92de0716b7 (patch) | |
| tree | 3c7e8f7768491eb2f48775867ad1cf9c79105c3b | |
| parent | tcg/arm: fix cross-endian qemu_st16 (diff) | |
| download | qemu-kvm-b3be4af3b1be2c749b1b46c179786e92de0716b7.tar.gz qemu-kvm-b3be4af3b1be2c749b1b46c179786e92de0716b7.tar.bz2 qemu-kvm-b3be4af3b1be2c749b1b46c179786e92de0716b7.zip | |
target-openrisc: remove conflicting definitions from cpu.h
On an ARM host, the registers definitions from cpu.h clash
with /usr/include/sys/ucontext.h. As there are unused, just remove
them.
Cc: Jia Liu <proljc@gmail.com>
Cc: qemu-stable@nongnu.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
(cherry picked from commit 44e04d3b945ba6f5cc87e65192081da4783f73fa)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
(cherry picked from commit 4a8e490cbc15ad3fd88180ebff016cdd56242987)
| -rw-r--r-- | target-openrisc/cpu.h | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index de21a877d..244788c3f 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -89,24 +89,6 @@ enum { /* Interrupt */ #define NR_IRQS 32 -/* Registers */ -enum { - R0 = 0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, - R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, - R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, - R31 -}; - -/* Register aliases */ -enum { - R_ZERO = R0, - R_SP = R1, - R_FP = R2, - R_LR = R9, - R_RV = R11, - R_RVH = R12 -}; - /* Unit presece register */ enum { UPR_UP = (1 << 0), |