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authorIgor Kovalenko <igor.v.kovalenko@gmail.com>2009-07-12 07:41:42 +0000
committerBlue Swirl <blauwirbel@gmail.com>2009-07-12 07:41:42 +0000
commite8807b14cc8c12c0e14c08fa396d9da043b48209 (patch)
treee04623152512df9b5a2e4224403d068dd334f6c3 /target-sparc
parentFix PCI IRQ breakage (diff)
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sparc64: mmu bypass mode correction
This Implement physical address truncation in mmu bypass mode. IMMU bypass is also active when cpu enters RED_STATE Signed-off-by: igor.v.kovalenko@gmail.com -- Kind regards, Igor V. Kovalenko
Diffstat (limited to 'target-sparc')
-rw-r--r--target-sparc/helper.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 2f41418c8..cd067df1d 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -369,6 +369,13 @@ void dump_mmu(CPUState *env)
#endif /* DEBUG_MMU */
#else /* !TARGET_SPARC64 */
+
+// 41 bit physical address space
+static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
+{
+ return x & 0x1ffffffffffULL;
+}
+
/*
* UltraSparc IIi I/DMMUs
*/
@@ -380,7 +387,7 @@ static int get_physical_address_data(CPUState *env,
unsigned int i;
if ((env->lsu & DMMU_E) == 0) { /* DMMU disabled */
- *physical = address;
+ *physical = ultrasparc_truncate_physical(address);
*prot = PAGE_READ | PAGE_WRITE;
return 0;
}
@@ -442,8 +449,9 @@ static int get_physical_address_code(CPUState *env,
target_ulong mask;
unsigned int i;
- if ((env->lsu & IMMU_E) == 0) { /* IMMU disabled */
- *physical = address;
+ if ((env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0) {
+ /* IMMU disabled */
+ *physical = ultrasparc_truncate_physical(address);
*prot = PAGE_EXEC;
return 0;
}