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* Handle cpu_model in copy_cpu(), by Kirill A. Shutemov.ths2007-12-091-0/+1
* Larger physical address space for 32-bit MIPS.ths2007-12-021-0/+3
* Micro-optimize back-to-back store-load sequences.ths2007-11-261-103/+135
* Optimize the conventional move operation.ths2007-11-221-0/+6
* Fix off-by-one address checks in MIPS64 MMU, by Aurelien Jarno.ths2007-11-221-4/+4
* Add older 4Km variants.ths2007-11-191-0/+34
* Add strict checking mode for softfp code.pbrook2007-11-181-4/+4
* Fix MIPS64 R2 instructions.ths2007-11-183-30/+34
* Use a valid PRid.ths2007-11-181-1/+1
* Fix int/float inconsistencies.pbrook2007-11-173-36/+34
* Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPths2007-11-141-2/+19
* added cpu_model parameter to cpu_init()bellard2007-11-103-29/+23
* Use FORCE_RET, scrap RETURN which was implemented in target-specific code.ths2007-11-095-424/+418
* Move kernel loader parameters from the cpu state to being board specific.ths2007-11-091-5/+0
* Clean out the N32 macros from target-mips, and introduce MIPS ABI specificths2007-11-089-61/+61
* Formatting fix.ths2007-11-081-1/+1
* Adjust s390 addresses (the MSB is defined as "to be ignored").ths2007-10-291-1/+5
* Preliminary MIPS64R2 mode.ths2007-10-291-0/+21
* Fix logic bug which broke TLBL/TLBS handling somewhat.ths2007-10-291-3/+3
* Restrict CP0_PerfCnt to legal values.ths2007-10-291-1/+1
* Implement missing MIPS supervisor mode bits.ths2007-10-286-35/+49
* Add sharable clz/clo inline functions and use them for the mips target.ths2007-10-273-49/+33
* The other half of the mul64 rework. Sorry for the breakage, I committedths2007-10-261-2/+2
* Remove bogus instruction decode.ths2007-10-241-1/+0
* Force proper sign extension for mfc0/mfhc0 on MIPS64.ths2007-10-241-2/+2
* Fix writable length of the index register.ths2007-10-231-1/+8
* Enforce proper sign extension for lwl/lwr on MIPS64.ths2007-10-231-1/+3
* Fix CLO calculation for MIPS64. And a small code cleanup.ths2007-10-231-5/+5
* Use the standard ASE check for MIPS-3D and MT.ths2007-10-233-93/+80
* Switch bc1any* instructions off if no MIPS-3D is implemented.ths2007-10-231-1/+9
* Handle IBE on MIPS properly.ths2007-10-202-0/+11
* Update TODO.ths2007-10-171-0/+6
* Replace is_user variable with mmu_idx in softmmu core,j_mayer2007-10-144-7/+18
* Update TODO.ths2007-10-131-1/+26
* Fix off-by-one in address check.ths2007-10-131-11/+8
* Unify '-cpu ?' option.j_mayer2007-10-121-0/+1
* Use always_inline in the MIPS support where applicable.ths2007-10-094-28/+28
* Delete file which should have been removed in the lst commit.ths2007-10-091-301/+0
* Fix [ls][wd][lr] instructions, by Aurelien Jarno.ths2007-10-094-67/+206
* Code provision for n32/n64 mips userland emulation. Not functional yet.ths2007-09-3011-66/+66
* Update TODO.ths2007-09-301-7/+0
* Supervisor mode implementation, by Aurelien Jarno.ths2007-09-293-34/+46
* Less magic constants.ths2007-09-291-25/+29
* Fix MIPS FP underflow handling, spotted by Daniel Jacobowitz.ths2007-09-281-13/+0
* Move get_sp_from_cpustate from cpu.h to target_signal.h.ths2007-09-271-5/+0
* linux-user sigaltstack() syscall, by Thayne Harbaugh.ths2007-09-271-0/+5
* hflags computation cleanup, by Aurelien Jarno.ths2007-09-263-62/+32
* Wrap a few often used tests with unlikely(), by Aurelien Jarno.ths2007-09-261-6/+6
* Timer start/stop implementation, by Aurelien Jarno.ths2007-09-253-3/+22
* Optimise instructions accessing CP0, by Aurelien Jarno.ths2007-09-254-34/+49