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path: root/mlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
Commit message (Expand)AuthorAgeFilesLines
* [mlir][StandardToSPIRV] Add support for lowering std.xor on bool to SPIR-VmainHanhan Wang2021-04-201-0/+4
* [mlir][StandardToSPIRV] Add support for lowering math.powf to SPIR-V.Hanhan Wang2021-04-131-0/+2
* [mlir][spirv] Allow bitwidth emulation on runtime arraysLei Zhang2021-04-121-0/+13
* [mlir][StandardToSPIRV] Handle i1 case for lowering memref.load/store opHanhan Wang2021-04-081-1/+54
* [MLIR] Create memref dialect and move dialect-specific ops from std.Julian Gross2021-03-151-17/+17
* [mlir][spirv] Convert tensor.extract for very small tensorsLei Zhang2021-03-061-0/+29
* [MLIR][SPIRV] Rename `spv.constant` to `spv.Constant`.KareemErgawy-TomTom2021-03-041-102/+102
* Revert "[MLIR] Create memref dialect and move several dialect-specific ops fr...Alexander Belyaev2021-02-181-8/+8
* [MLIR] Create memref dialect and move several dialect-specific ops from std.Julian Gross2021-02-181-8/+8
* [mlir][StandardToSPIRV] Add support for lowering trunci to SPIR-V to i1 types.Hanhan Wang2021-02-171-0/+24
* [mlir][spirv] Lower sexti -> SConvertBenjamin Kramer2021-02-121-0/+14
* [mlir][math] Split off the math dialect.Stephan Herhut2021-02-121-7/+7
* [mlir][spirv] Add more vector conversion patternsLei Zhang2021-02-051-3/+3
* [mlir][spirv] Define spv.IsNan/spv.IsInf and add loweringsLei Zhang2021-01-221-0/+26
* [mlir][spirv] Fix script for availability autogen and refresh opsLei Zhang2021-01-221-2/+31
* [mlir][StandardToSPIRV] Add support for lowering uitofp to SPIR-VHanhan Wang2021-01-211-0/+61
* [mlir]][SPIRV] Define OrderedOp and UnorderedOp and add lowerings from Standard.MaheshRavishankar2021-01-211-0/+4
* [mlir][OpFormatGen] Format enum attribute cases as keywords when possibleRiver Riddle2021-01-141-27/+27
* [mlir][spirv] Replace SPIRVOpLowering with OpConversionPatternLei Zhang2021-01-091-18/+28
* [mlir][spirv] Convert functions returning one valueLei Zhang2020-12-231-0/+26
* [mlir][StandardToSPIRV] Extend support for lowering cmpi to SPIRV.Hanhan Wang2020-11-161-0/+9
* [MLIR][SPIRV] Support identified and recursive structs.ergawy2020-10-131-4/+4
* [mlir][StandardToSPIRV] Handle vector of i1 case for lowering zexti to SPIR-V.Hanhan Wang2020-09-181-0/+9
* [spirv][nfc] Simplify resource limit with default valuesLei Zhang2020-09-031-38/+12
* Added std.floor operation to match std.ceilRob Suderman2020-08-181-0/+2
* [mlir][StandardToSPIRV] Use spv.UMod for index re-calculationLei Zhang2020-08-051-6/+6
* [MLIR][StdToSPIRV] Fixed a typo in ops conversion testsGeorge Mitenkov2020-07-141-1/+0
* [mlir][StandardToSPIRV] Fix conversion for signed remainderLei Zhang2020-07-131-10/+32
* [mlir] Refactor BoolAttr to be a special case of IntegerAttrRiver Riddle2020-06-041-2/+2
* [mlir][StandardToSPIRV] Handle i1 case for lowering std.zexti to SPIR-V.Hanhan Wang2020-06-031-0/+9
* [mlir][spirv] Lower allocation/deallocations of workgroup memory.MaheshRavishankar2020-05-271-4/+8
* [mlir][StandardToSPIRV] Fix signedness issue in bitwidth emulation.Hanhan Wang2020-05-191-8/+36
* [mlir][StandardToSPIRV] Add support for lowering index_cast to SPIR-V.Hanhan Wang2020-05-111-0/+28
* [mlir][StandardToSPIRV] Add support for lowering FPToSIOp to SPIR-V.Hanhan Wang2020-05-111-0/+14
* [mlir][StandardToSPIRV] Emulate bitwidths not supported for store op.Hanhan Wang2020-05-041-1/+96
* [mlir] Add sine operation to Standard dialect.MaheshRavishankar2020-04-301-0/+2
* [mlir][StandardToSPIRV] Add support for lowering integer casting.Hanhan Wang2020-04-301-0/+28
* [mlir][StandardToSPIRV] Emulate bitwidths not supported for load op.Hanhan Wang2020-04-301-0/+112
* [mlir][StandardToSPIRV] Handle conversion of cmpi operation with i1MaheshRavishankar2020-04-291-0/+9
* [mlir][spirv] Lower memref with dynamic dimensions to runtime arraysLei Zhang2020-04-201-0/+612