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| author |   Sam James <sam@gentoo.org> | 2024-11-07 16:13:27 +0000 |
|---|---|---|
| committer | Sam James <sam@gentoo.org> | 2024-11-07 16:13:27 +0000 |
| commit | 5f55e0a35a6595391420057c748c94110a41cacd (patch) | |
| tree | 04eb18952411e8012046e32f8b03945f2de0391d | |
| parent | 15.0.0: drop 72_all_PR117363-revert.patch (diff) | |
| download | gcc-patches-5f55e0a35a6595391420057c748c94110a41cacd.tar.gz gcc-patches-5f55e0a35a6595391420057c748c94110a41cacd.tar.bz2 gcc-patches-5f55e0a35a6595391420057c748c94110a41cacd.zip | |
15.0.0: add 72_all_PR117476-revert.patch
Bug: https://gcc.gnu.org/PR117476
Signed-off-by: Sam James <sam@gentoo.org>
| -rw-r--r-- | 15.0.0/gentoo/72_all_PR117476-revert.patch | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/15.0.0/gentoo/72_all_PR117476-revert.patch b/15.0.0/gentoo/72_all_PR117476-revert.patch new file mode 100644 index 0000000..c073213 --- /dev/null +++ b/15.0.0/gentoo/72_all_PR117476-revert.patch @@ -0,0 +1,74 @@ +From 7f98f96e02bd3b5cac35655d933382f9225fef59 Mon Sep 17 00:00:00 2001 +Message-ID: <7f98f96e02bd3b5cac35655d933382f9225fef59.1730995976.git.sam@gentoo.org> +From: Sam James <sam@gentoo.org> +Date: Thu, 7 Nov 2024 16:12:40 +0000 +Subject: [PATCH] Revert "[PATCH v2] RISC-V: zero_extend(not) -> xor + optimization [PR112398]" + +This reverts commit 69bd93c167fefbdff0cb88614275358b7a2b2941. + +Bug: https://gcc.gnu.org/PR117476 +--- + gcc/simplify-rtx.cc | 22 ---------------------- + gcc/testsuite/gcc.target/riscv/pr112398.c | 14 -------------- + 2 files changed, 36 deletions(-) + delete mode 100644 gcc/testsuite/gcc.target/riscv/pr112398.c + +diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc +index d05efac20dc8..893c5f6e1ae0 100644 +--- a/gcc/simplify-rtx.cc ++++ b/gcc/simplify-rtx.cc +@@ -1842,28 +1842,6 @@ simplify_context::simplify_unary_operation_1 (rtx_code code, machine_mode mode, + & ~GET_MODE_MASK (op_mode)) == 0) + return SUBREG_REG (op); + +- /* Trying to optimize: +- (zero_extend:M (subreg:N (not:M (X:M)))) -> +- (xor:M (zero_extend:M (subreg:N (X:M)), mask)) +- where the mask is GET_MODE_MASK (N). +- For the cases when X:M doesn't have any non-zero bits +- outside of mode N, (zero_extend:M (subreg:N (X:M)) +- will be simplified to just (X:M) +- and whole optimization will be -> (xor:M (X:M, mask)). */ +- if (SUBREG_P (op) +- && GET_CODE (XEXP (op, 0)) == NOT +- && GET_MODE (XEXP (op, 0)) == mode +- && subreg_lowpart_p (op) +- && GET_MODE_SIZE (GET_MODE (op)).is_constant () +- && (nonzero_bits (XEXP (XEXP (op, 0), 0), mode) +- & ~GET_MODE_MASK (mode)) == 0) +- { +- const uint64_t mask = GET_MODE_MASK (GET_MODE (op)); +- return simplify_gen_binary (XOR, mode, +- XEXP (XEXP (op, 0), 0), +- gen_int_mode (mask, mode)); +- } +- + #if defined(POINTERS_EXTEND_UNSIGNED) + /* As we do not know which address space the pointer is referring to, + we can do this only if the target does not support different pointer +diff --git a/gcc/testsuite/gcc.target/riscv/pr112398.c b/gcc/testsuite/gcc.target/riscv/pr112398.c +deleted file mode 100644 +index 624a665b76c9..000000000000 +--- a/gcc/testsuite/gcc.target/riscv/pr112398.c ++++ /dev/null +@@ -1,14 +0,0 @@ +-/* { dg-do compile } */ +-/* { dg-options "-march=rv64gc -mabi=lp64d" } */ +-/* { dg-skip-if "" { *-*-* } { "-O0" "-Og" } } */ +- +-#include <stdint.h> +- +-uint8_t neg_u8 (const uint8_t src) +-{ +- return ~src; +-} +- +-/* { dg-final { scan-assembler-times "xori\t" 1 } } */ +-/* { dg-final { scan-assembler-not "not\t" } } */ +-/* { dg-final { scan-assembler-not "andi\t" } } */ + +base-commit: 6a6b8b847bce78a909379f3b9d3365c4ac4f0ff5 +-- +2.47.0 + |