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authorZhang Le <r0bertz@gentoo.org>2010-03-21 00:19:37 +0800
committerZhang Le <r0bertz@gentoo.org>2010-03-21 00:19:37 +0800
commit6d20f37e81ea294926ad19421f959a8388b36d37 (patch)
tree43362c0ba8596984d0dcd2ee3a498949df5b7b7a
parentadded crt enable patch for x11 sm driver (diff)
downloadloongson-6d20f37e81ea294926ad19421f959a8388b36d37.tar.gz
loongson-6d20f37e81ea294926ad19421f959a8388b36d37.tar.bz2
loongson-6d20f37e81ea294926ad19421f959a8388b36d37.zip
removed binutils-2.20.1, because someone reported it doesn't contain loongson patch
Signed-off-by: Zhang Le <r0bertz@gentoo.org>
-rw-r--r--sys-devel/binutils/Manifest5
-rw-r--r--sys-devel/binutils/binutils-2.20-r1.ebuild (renamed from sys-devel/binutils/binutils-2.20.1.ebuild)8
-rw-r--r--sys-devel/binutils/files/binutils-2.19.1-loongson2f.patch159
-rw-r--r--sys-devel/binutils/files/elfxx-mips.c.diff133
4 files changed, 10 insertions, 295 deletions
diff --git a/sys-devel/binutils/Manifest b/sys-devel/binutils/Manifest
index 7e5f8f8..2d5848b 100644
--- a/sys-devel/binutils/Manifest
+++ b/sys-devel/binutils/Manifest
@@ -3,6 +3,7 @@ AUX binutils-2.20-loongson2f.patch 19769 RMD160 744c28f130687f496ac6d16784eeefcc
AUX binutils-9999-loongson2f.patch 19769 RMD160 744c28f130687f496ac6d16784eeefcc46250f3b SHA1 af7aab914d09e38a5eee820a544f754422da2070 SHA256 1c4b51caa063aa70a71e8bbfcc1d1bb42abf5c4c70abd68d77eab5d7d4d23bbe
AUX elfxx-mips.c.diff 4980 RMD160 51b59f372a400f707b205e7dd3a737be327c786e SHA1 d845ffab8a53758c24194baf2206bd455a61f7bc SHA256 5c526f5267dcb6055ddc94001449c57f8bb957481d92adad30d98cf2ae45c9ca
AUX pr10858.diff 883 RMD160 554d96ad1ac570dac9e85bd25047268b2b2d9317 SHA1 857c259fd91c09412ce7d113eb9c434cf0c5cc6e SHA256 45cff8d364091d726dce9d8d48968fd7ad09acc24c99a36919d5d82dd90e78b7
-DIST binutils-2.20.1.tar.bz2 17501436 RMD160 2ab2de504a85840d1ec227eff50b5f4d2cad581e SHA1 fd2ba806e6f3a55cee453cb25c86991b26a75dee SHA256 228b84722d87e88e7fdd36869e590e649ab523a0800a7d53df906498afe6f6f8
-EBUILD binutils-2.20.1.ebuild 381 RMD160 1204dea2ee77295c04a33faccbe5198596ce2a49 SHA1 fa283e644bbdf333b3f71c46428b31e9fb5c172a SHA256 a7e30cac93aa7c28ee8025e224952fbdd0c97cdda3fdf5acb1bbdae846ca9777
+DIST binutils-2.20-patches-1.0.tar.bz2 7610 RMD160 83c7b5e535753687ca6c79cfecc47786763a2c71 SHA1 de70b21264d6aad10e8be8f601ec683001461e1a SHA256 069d0888f1bea4104aed2edbe3b1b9ddc29de3772fcb96989698630c07a61180
+DIST binutils-2.20.tar.bz2 17506655 RMD160 284074e2453e517d036ffce2c0f3d56439e2e5c0 SHA1 747e7b4d94bce46587236dc5f428e5b412a590dc SHA256 e1df09f0aa3b50154ef93bfefe86d65d01c22cfb44d73299ad95e772133a75b0
+EBUILD binutils-2.20-r1.ebuild 509 RMD160 113056c1a3298315d8d8877f24dd6cb66d5db115 SHA1 08a21540217169c6236b0210a8162df328ee53db SHA256 2614d59e4da6ae6ac1723d6b15939f61d380051e94142dbf93ba45bc8cb1da1a
EBUILD binutils-9999.ebuild 293 RMD160 e522354b3663fe3abce2ab012a912cb19747427d SHA1 0dd68e9f3beceef64d5a9e87e7ded53b50899d3d SHA256 6fbaf30944f7bed10f6c9f5fa301af6ff5138e8c43326b7aad87d8d5be632653
diff --git a/sys-devel/binutils/binutils-2.20.1.ebuild b/sys-devel/binutils/binutils-2.20-r1.ebuild
index 421317d..54ceef5 100644
--- a/sys-devel/binutils/binutils-2.20.1.ebuild
+++ b/sys-devel/binutils/binutils-2.20-r1.ebuild
@@ -2,8 +2,14 @@
# Distributed under the terms of the GNU General Public License v2
# $Header: /var/cvsroot/gentoo-x86/sys-devel/binutils/binutils-2.20.ebuild,v 1.1 2009/10/19 07:33:19 vapier Exp $
-PATCHVER=""
+PATCHVER="1.0"
ELF2FLT_VER=""
inherit toolchain-binutils
KEYWORDS="~alpha ~amd64 ~arm ~hppa ~ia64 ~mips ~ppc ~ppc64 ~s390 ~sh ~sparc ~x86 ~sparc-fbsd ~x86-fbsd"
+src_unpack() {
+ unpack ${A}
+ cd "${S}"
+ epatch ${FILESDIR}/binutils-2.20-loongson2f.patch
+ epatch ${FILESDIR}/pr10858.diff
+}
diff --git a/sys-devel/binutils/files/binutils-2.19.1-loongson2f.patch b/sys-devel/binutils/files/binutils-2.19.1-loongson2f.patch
deleted file mode 100644
index 435a75d..0000000
--- a/sys-devel/binutils/files/binutils-2.19.1-loongson2f.patch
+++ /dev/null
@@ -1,159 +0,0 @@
-diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
-index 3cdf97b..ef749ce 100644
---- a/gas/config/tc-mips.c
-+++ b/gas/config/tc-mips.c
-@@ -758,6 +758,9 @@ static int mips_fix_vr4120;
- /* ...likewise -mfix-vr4130. */
- static int mips_fix_vr4130;
-
-+/* True if -mfix-ls2f-kernel. */
-+static int mips_fix_ls2f_kernel;
-+
- /* We don't relax branches by default, since this causes us to expand
- `la .l2 - .l1' if there's a branch between .l1 and .l2, because we
- fail to compute the offset before expanding the macro to the most
-@@ -3873,6 +3876,24 @@ normalize_address_expr (expressionS *ex)
- }
-
- /*
-+ * Eliminate instruction fetch from outside 256M region.
-+ * jr target pc &= 'hffff_ffff_cfff_ffff
-+ * FOR KERNEL ONLY
-+ */
-+static void
-+macro_build_jrpatch (expressionS *ex, unsigned int sreg)
-+{
-+ if (mips_fix_ls2f_kernel && AT && sreg != 26 && sreg != 27) {
-+ ex->X_op = O_constant;
-+ ex->X_add_number = 0xcfff0000;
-+ macro_build (ex, "lui", "t,u", ATREG, BFD_RELOC_HI16);
-+ ex->X_add_number = 0xffff;
-+ macro_build (ex, "ori", "t,r,i", ATREG, ATREG, BFD_RELOC_LO16);
-+ macro_build (NULL, "and", "d,v,t", sreg, sreg, ATREG);
-+ }
-+}
-+
-+/*
- * Generate a "jalr" instruction with a relocation hint to the called
- * function. This occurs in NewABI PIC code.
- */
-@@ -3886,6 +3910,7 @@ macro_build_jalr (expressionS *ep)
- frag_grow (8);
- f = frag_more (0);
- }
-+ macro_build_jrpatch (ep, PIC_CALL_REG);
- macro_build (NULL, "jalr", "d,s", RA, PIC_CALL_REG);
- if (HAVE_NEWABI)
- fix_new_exp (frag_now, f - frag_now->fr_literal,
-@@ -6031,6 +6056,26 @@ macro (struct mips_cl_insn *ip)
- macro_build (NULL, ADDRESS_ADD_INSN, "d,v,t", treg, tempreg, breg);
- break;
-
-+ case M_JR_S:
-+ macro_build_jrpatch (&expr1, sreg);
-+ macro_build (NULL, "jr", "s", sreg);
-+ break;
-+
-+ case M_J_S:
-+ macro_build_jrpatch (&expr1, sreg);
-+ macro_build (NULL, "j", "s", sreg);
-+ break;
-+
-+ case M_JALR_S:
-+ macro_build_jrpatch (&expr1, sreg);
-+ macro_build (NULL, "jalr", "s", sreg);
-+ break;
-+
-+ case M_JALR_DS:
-+ macro_build_jrpatch (&expr1, sreg);
-+ macro_build (NULL, "jalr", "d,s", dreg, sreg);
-+ break;
-+
- case M_J_A:
- /* The j instruction may not be used in PIC code, since it
- requires an absolute address. We convert it to a b
-@@ -6049,12 +6094,16 @@ macro (struct mips_cl_insn *ip)
- /* Fall through. */
- case M_JAL_2:
- if (mips_pic == NO_PIC)
-- macro_build (NULL, "jalr", "d,s", dreg, sreg);
-+ {
-+ macro_build_jrpatch (&expr1, sreg);
-+ macro_build (NULL, "jalr", "d,s", dreg, sreg);
-+ }
- else
- {
- if (sreg != PIC_CALL_REG)
- as_warn (_("MIPS PIC call to register other than $25"));
-
-+ macro_build_jrpatch (&expr1, sreg);
- macro_build (NULL, "jalr", "d,s", dreg, sreg);
- if (mips_pic == SVR4_PIC && !HAVE_NEWABI)
- {
-@@ -11178,9 +11227,11 @@ struct option md_longopts[] =
- #define OPTION_NO_FIX_VR4130 (OPTION_FIX_BASE + 5)
- {"mfix-vr4130", no_argument, NULL, OPTION_FIX_VR4130},
- {"mno-fix-vr4130", no_argument, NULL, OPTION_NO_FIX_VR4130},
-+#define OPTION_FIX_LS2F_KERNEL (OPTION_FIX_BASE + 6)
-+ {"mfix-ls2f-kernel", no_argument, NULL, OPTION_FIX_LS2F_KERNEL},
-
- /* Miscellaneous options. */
--#define OPTION_MISC_BASE (OPTION_FIX_BASE + 6)
-+#define OPTION_MISC_BASE (OPTION_FIX_BASE + 7)
- #define OPTION_TRAP (OPTION_MISC_BASE + 0)
- {"trap", no_argument, NULL, OPTION_TRAP},
- {"no-break", no_argument, NULL, OPTION_TRAP},
-@@ -11478,6 +11529,10 @@ md_parse_option (int c, char *arg)
- mips_fix_vr4130 = 0;
- break;
-
-+ case OPTION_FIX_LS2F_KERNEL:
-+ mips_fix_ls2f_kernel = 1;
-+ break;
-+
- case OPTION_RELAX_BRANCH:
- mips_relax_branch = 1;
- break;
-diff --git a/include/opcode/mips.h b/include/opcode/mips.h
-index 8d201f6..d0a61c8 100644
---- a/include/opcode/mips.h
-+++ b/include/opcode/mips.h
-@@ -758,7 +758,11 @@ enum
- M_DSUB_I,
- M_DSUBU_I,
- M_DSUBU_I_2,
-+ M_JR_S,
-+ M_J_S, /*JCX*/
- M_J_A,
-+ M_JALR_S,
-+ M_JALR_DS,
- M_JAL_1,
- M_JAL_2,
- M_JAL_A,
-diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
-index 82a01f8..51034df 100644
---- a/opcodes/mips-opc.c
-+++ b/opcodes/mips-opc.c
-@@ -710,10 +710,12 @@ const struct mips_opcode mips_builtin_opcodes[] =
- {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D|RD_S|FP_S, 0, I2 },
- {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 },
- {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 },
-+{"jr", "s", 0, (int) M_JR_S, INSN_MACRO, 0, IL2F },
- {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 },
- /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with
- the same hazard barrier effect. */
- {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD|RD_s, 0, I32 },
-+{"j", "s", 0, (int) M_J_S, INSN_MACRO, 0, IL2F }, /* jcx */
- {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, /* jr */
- /* SVR4 PIC code requires special handling for j, so it must be a
- macro. */
-@@ -722,7 +724,9 @@ const struct mips_opcode mips_builtin_opcodes[] =
- assembler, but will never match user input (because the line above
- will match first). */
- {"j", "a", 0x08000000, 0xfc000000, UBD, 0, I1 },
-+{"jalr", "s", 0, (int) M_JALR_S, INSN_MACRO, 0, IL2F },
- {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD|RD_s|WR_d, 0, I1 },
-+{"jalr", "d,s", 0, (int) M_JALR_DS, INSN_MACRO, 0, IL2F },
- {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD|RD_s|WR_d, 0, I1 },
- /* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
- with the same hazard barrier effect. */
diff --git a/sys-devel/binutils/files/elfxx-mips.c.diff b/sys-devel/binutils/files/elfxx-mips.c.diff
deleted file mode 100644
index 804edb5..0000000
--- a/sys-devel/binutils/files/elfxx-mips.c.diff
+++ /dev/null
@@ -1,133 +0,0 @@
-===================================================================
-RCS file: /cvs/src/src/bfd/elfxx-mips.c,v
-retrieving revision 1.255
-retrieving revision 1.256
-diff -u -r1.255 -r1.256
---- src/bfd/elfxx-mips.c 2009/05/21 14:15:49 1.255
-+++ src/bfd/elfxx-mips.c 2009/07/17 09:46:00 1.256
-@@ -662,6 +662,12 @@
- /* This will be used when we sort the dynamic relocation records. */
- static bfd *reldyn_sorting_bfd;
-
-+/* True if ABFD is for CPUs with load interlocking that include
-+ non-MIPS1 CPUs and R3900. */
-+#define LOAD_INTERLOCKS_P(abfd) \
-+ ( ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) != E_MIPS_ARCH_1) \
-+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_3900))
-+
- /* True if ABFD is a PIC object. */
- #define PIC_OBJECT_P(abfd) \
- ((elf_elfheader (abfd)->e_flags & EF_MIPS_PIC) != 0)
-@@ -878,7 +884,8 @@
- #define CALL_FP_STUB_P(name) CONST_STRNEQ (name, CALL_FP_STUB)
-
- /* The format of the first PLT entry in an O32 executable. */
--static const bfd_vma mips_o32_exec_plt0_entry[] = {
-+static const bfd_vma mips_o32_exec_plt0_entry[] =
-+{
- 0x3c1c0000, /* lui $28, %hi(&GOTPLT[0]) */
- 0x8f990000, /* lw $25, %lo(&GOTPLT[0])($28) */
- 0x279c0000, /* addiu $28, $28, %lo(&GOTPLT[0]) */
-@@ -891,7 +898,8 @@
-
- /* The format of the first PLT entry in an N32 executable. Different
- because gp ($28) is not available; we use t2 ($14) instead. */
--static const bfd_vma mips_n32_exec_plt0_entry[] = {
-+static const bfd_vma mips_n32_exec_plt0_entry[] =
-+{
- 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
- 0x8dd90000, /* lw $25, %lo(&GOTPLT[0])($14) */
- 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
-@@ -904,7 +912,8 @@
-
- /* The format of the first PLT entry in an N64 executable. Different
- from N32 because of the increased size of GOT entries. */
--static const bfd_vma mips_n64_exec_plt0_entry[] = {
-+static const bfd_vma mips_n64_exec_plt0_entry[] =
-+{
- 0x3c0e0000, /* lui $14, %hi(&GOTPLT[0]) */
- 0xddd90000, /* ld $25, %lo(&GOTPLT[0])($14) */
- 0x25ce0000, /* addiu $14, $14, %lo(&GOTPLT[0]) */
-@@ -916,7 +925,8 @@
- };
-
- /* The format of subsequent PLT entries. */
--static const bfd_vma mips_exec_plt_entry[] = {
-+static const bfd_vma mips_exec_plt_entry[] =
-+{
- 0x3c0f0000, /* lui $15, %hi(.got.plt entry) */
- 0x01f90000, /* l[wd] $25, %lo(.got.plt entry)($15) */
- 0x25f80000, /* addiu $24, $15, %lo(.got.plt entry) */
-@@ -924,7 +934,8 @@
- };
-
- /* The format of the first PLT entry in a VxWorks executable. */
--static const bfd_vma mips_vxworks_exec_plt0_entry[] = {
-+static const bfd_vma mips_vxworks_exec_plt0_entry[] =
-+{
- 0x3c190000, /* lui t9, %hi(_GLOBAL_OFFSET_TABLE_) */
- 0x27390000, /* addiu t9, t9, %lo(_GLOBAL_OFFSET_TABLE_) */
- 0x8f390008, /* lw t9, 8(t9) */
-@@ -934,7 +945,8 @@
- };
-
- /* The format of subsequent PLT entries. */
--static const bfd_vma mips_vxworks_exec_plt_entry[] = {
-+static const bfd_vma mips_vxworks_exec_plt_entry[] =
-+{
- 0x10000000, /* b .PLT_resolver */
- 0x24180000, /* li t8, <pltindex> */
- 0x3c190000, /* lui t9, %hi(<.got.plt slot>) */
-@@ -946,7 +958,8 @@
- };
-
- /* The format of the first PLT entry in a VxWorks shared object. */
--static const bfd_vma mips_vxworks_shared_plt0_entry[] = {
-+static const bfd_vma mips_vxworks_shared_plt0_entry[] =
-+{
- 0x8f990008, /* lw t9, 8(gp) */
- 0x00000000, /* nop */
- 0x03200008, /* jr t9 */
-@@ -956,7 +969,8 @@
- };
-
- /* The format of subsequent PLT entries. */
--static const bfd_vma mips_vxworks_shared_plt_entry[] = {
-+static const bfd_vma mips_vxworks_shared_plt_entry[] =
-+{
- 0x10000000, /* b .PLT_resolver */
- 0x24180000 /* li t8, <pltindex> */
- };
-@@ -8631,8 +8645,10 @@
- else if (s == htab->splt)
- {
- /* If the last PLT entry has a branch delay slot, allocate
-- room for an extra nop to fill the delay slot. */
-- if (!htab->is_vxworks && s->size > 0)
-+ room for an extra nop to fill the delay slot. This is
-+ for CPUs without load interlocking. */
-+ if (! LOAD_INTERLOCKS_P (output_bfd)
-+ && ! htab->is_vxworks && s->size > 0)
- s->size += 4;
- }
- else if (! CONST_STRNEQ (name, ".init")
-@@ -9355,8 +9371,17 @@
- plt_entry = mips_exec_plt_entry;
- bfd_put_32 (output_bfd, plt_entry[0] | got_address_high, loc);
- bfd_put_32 (output_bfd, plt_entry[1] | got_address_low | load, loc + 4);
-- bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 8);
-- bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
-+
-+ if (! LOAD_INTERLOCKS_P (output_bfd))
-+ {
-+ bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 8);
-+ bfd_put_32 (output_bfd, plt_entry[3], loc + 12);
-+ }
-+ else
-+ {
-+ bfd_put_32 (output_bfd, plt_entry[3], loc + 8);
-+ bfd_put_32 (output_bfd, plt_entry[2] | got_address_low, loc + 12);
-+ }
-
- /* Emit an R_MIPS_JUMP_SLOT relocation against the .got.plt entry. */
- mips_elf_output_dynamic_relocation (output_bfd, htab->srelplt,