summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorAvi Kivity <avi@redhat.com>2010-05-09 14:05:19 +0300
committerAvi Kivity <avi@redhat.com>2010-05-09 14:05:19 +0300
commit4b1b0617b6f454b368a7f04786c0bc842253f849 (patch)
tree46842c3026a59c6431e9c236734666b5d7286836 /target-sh4/cpu.h
parentpci passthrough: zap option rom scanning. (diff)
parentUpdate for 0.12.4 release (diff)
downloadqemu-kvm-0.12.4.tar.gz
qemu-kvm-0.12.4.tar.bz2
qemu-kvm-0.12.4.zip
Merge commit 'v0.12.4' into stable-0.12qemu-kvm-0.12.4
* commit 'v0.12.4': (49 commits) Update for 0.12.4 release Workaround for broken OSS_GETVERSION on FreeBSD, part two oss: fix fragment setting oss: issue OSS_GETVERSION ioctl only when needed oss: refactor code around policy setting oss: workaround for cases when OSS_GETVERSION is not defined block: Free iovec arrays allocated by multiwrite_merge() lsi: fix segfault in lsi_command_complete lsi: pass lsi_request to lsi_reselect lsi: move dma_len+dma_buf into lsi_request lsi: move current_dev into lsi_request lsi: have lsi_request for the whole life time of the request. lsi: use QTAILQ for lsi_queue tcp/mips: Change TCG_AREG0 (fp -> s0) sh_pci: fix memory and I/O access Fix incoming migration with iothread Fix SIGFPE for vnc display of width/height = 1 net: remove broken net_set_boot_mask() boot device validation qcow2: Remove request from in-flight list after error qcow2: Don't ignore immediate read/write failures ... Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'target-sh4/cpu.h')
-rw-r--r--target-sh4/cpu.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h
index 366e7986e..015d59845 100644
--- a/target-sh4/cpu.h
+++ b/target-sh4/cpu.h
@@ -167,6 +167,7 @@ int cpu_sh4_handle_mmu_fault(CPUSH4State * env, target_ulong address, int rw,
void do_interrupt(CPUSH4State * env);
void sh4_cpu_list(FILE *f, int (*cpu_fprintf)(FILE *f, const char *fmt, ...));
+void cpu_sh4_invalidate_tlb(CPUSH4State *s);
void cpu_sh4_write_mmaped_utlb_addr(CPUSH4State *s, target_phys_addr_t addr,
uint32_t mem_value);
@@ -222,6 +223,7 @@ enum {
/* MMU control register */
#define MMUCR 0x1F000010
#define MMUCR_AT (1<<0)
+#define MMUCR_TI (1<<2)
#define MMUCR_SV (1<<8)
#define MMUCR_URC_BITS (6)
#define MMUCR_URC_OFFSET (10)